One paper has been accepted to Design, Automation, and Test in Europe (DATE) 2023 as a regular paper!
(Accept. rate < 25%)
Title: FPGA-Based Accelerator for Rank-Enhanced and Highly-Pruned Block-Circulant Neural Networks,
with H. Song, J. Yoon, D. Kim, E. Kwon, Tae-Hyun Oh, S. Kang